Solid-state memory, such as flash, is currently in use in solid-state drives (SSD) to augment or replace conventional hard disk drives (HDD), writable CD (compact disk) or writable DVD (digital versatile disk) drives, collectively known as spinning media, and tape drives, for storage of large amounts of data. Flash and other solid-state memories have characteristics that differ from spinning media. Yet, many solid-state drives are designed to conform to hard disk drive standards for compatibility reasons, which makes it difficult to provide enhanced features or take advantage of unique aspects of flash and other solid-state memory.
Flash memories that can operate in single level cell (SLC) mode or one or more types of multilevel cell (MLC) mode such as two bits per cell, three bits per cell (also known as triple level cell or TLC, a type of MLC) or four bits per cell (also known as quad level cell or QLC, a further type of MLC) place the burden of managing flash memory mode onto the flash controller. State transitions to switch back and forth between flash memory modes can impact storage system performance. It is within this context that the embodiments arise.